Systems Engineering and Electronics ›› 2025, Vol. 47 ›› Issue (2): 376-389.doi: 10.12305/j.issn.1001-506X.2025.02.05
• Electronic Technology • Previous Articles
Xuejian LI1,2, Yongqiang CHEN3, Hong MA1,2, Yang LIU4, Yuxin WANG1,2, Yiwen JIAO1,2,*
Received:
2024-01-22
Online:
2025-02-25
Published:
2025-03-18
Contact:
Yiwen JIAO
CLC Number:
Xuejian LI, Yongqiang CHEN, Hong MA, Yang LIU, Yuxin WANG, Yiwen JIAO. Design of PCAL signal phase real-time extraction system based on parallel computing[J]. Systems Engineering and Electronics, 2025, 47(2): 376-389.
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