可配置的热点路径动态剖析器的硬件实现

Journal of Systems Engineering and Electronics ›› 2009, Vol. 31 ›› Issue (9): 2254-2259.

可配置的热点路径动态剖析器的硬件实现

张惠臻^1,2, 周学海^1,2, 纪金松¹, 陈香兰^1,2, 马宏星¹

1. 中国科学技术大学计算机科学与技术学院, 安徽, 合肥, 23002;
2. 中国科学技术大学苏州研究院, 江苏, 苏州, 215123

收稿日期:2008-08-12 修回日期:2009-04-10 出版日期:2009-09-20 发布日期:2010-01-03
作者简介:张惠臻(1983- ),男,博士研究生,主要研究方向为可重构计算、软件重定向.E-mail:zhanghz@mail.ustc.edu.cn
基金资助:
国家高技术研究发展计划(863计划)资助(2008AA01Z101);高等学校博士学科点专项科研基金(20050358040)资助课题

Configurable hardware profiler for dynamic hot path detection

ZHANG Hui-zhen^1,2, ZHOU Xue-hai^1,2, JI Jin-song¹, CHEN Xiang-lan^1,2, MA Hong-xing¹

1. Dept. of Computer Science and Technology, Univ. of Science and Technology of China, Hefei 230027, China;
2. Suzhou Inst. for Advanced Study of Univ. of Science and Technology of China, Suzhou 215123, China

Received:2008-08-12 Revised:2009-04-10 Online:2009-09-20 Published:2010-01-03

摘要/Abstract

摘要： 动态路径剖析技术能够在程序运行时识别其中频繁执行的代码块,从而指导程序的性能优化,在指令集扩展和动态二进制翻译等研究中都有着重要的应用。在对路径优化技术研究的基础上,提出一种适用于不同体系结构的简单高效的剖析器硬件实现方案(configurable hardware dynamic path profiler,CHDPP)。CHDPP能够与目标处理器低耦合地工作,通过识别程序中的分支指令来完成路径剖析并存储热点路径信息。实验结果表明,该方案在占用少量硬件资源的情况下能够高效地完成路径剖析,获得准确度高达94.1%的热点路径数和97.7%的热点路径相关信息。

Abstract: Dynamic path profiling technology can identify the frequent code segments,thus guiding performance optimization.It is very important and widely used in instruction sets extension,dynamic binary translation and so on.Based on the study of path optimization technology,a simple but efficient hardware path profiler(CHDPP) is proposed.CHDPP can be programmed to match several kinds of architectures.It catches the branch instructions,executes path profiling and stores the result information.Experiments show that the profiler is capable of obtaining high accuracy with few hardware resources,up to 94.1% for hot path number and 97.7% for relative information.

中图分类号:

TP302

张惠臻, 周学海, 纪金松, 陈香兰, 马宏星. 可配置的热点路径动态剖析器的硬件实现[J]. Journal of Systems Engineering and Electronics, 2009, 31(9): 2254-2259.

ZHANG Hui-zhen, ZHOU Xue-hai, JI Jin-song, CHEN Xiang-lan, MA Hong-xing. Configurable hardware profiler for dynamic hot path detection[J]. Journal of Systems Engineering and Electronics, 2009, 31(9): 2254-2259.

参考文献

[1] Wikipedia.Optimization(computer_science)[EB/OL].[2008-05-09].httpt://en.wiki pedia,org/ wki / o ptimization_(com puter_science.)
[2] Yu P,Mitra T.Scalable custom instructions identification for instruction-set extensiblc processors[C]//IProc,of the International Conference on Compilers,Architecture,and Synthetics for Embedded Systems,New York:ACM,2004:69-78.
[3] Cong J,Fan Y,Han G,et al.Application-specific instruction generation for configurable processor architectures[C]//Proc.of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays,New York:ACM,2004:183-189.
[4] Ahman E R,Ebcioglu K,Gschwind M.Advances and future challenges in binary translation and optimization[J].Proc.of the IEEE,2001,89(11):1710-1722.
[5] 唐遇星.面向动态二进制翻译的动态优化和微处理器体系结构支撑技术研究[D].长沙:国防科学技术大学,2005.
[6] Ball T,Larus J R.Efficient path profiling[C]//Proc,of the 29th Annual ACM/IEEE International Symposium on Microarchitecture,Washington DC:IEEE Computer Society,1996,46-57.
[7] Larus J R Whole program paths[C]//Proc,of the ACM SIGPLAN Conference on Programming Language Design and Implementation,Atlanta,GA:ACM,1999:259-269.
[8] Tallam S,Zhang X,Gupta R.Extending path profiling across loop backedges and procedure boundaries[C]//Proc.of the International Symposium on Code Generation and Optimization:Feedback-directed and Runtime Optimization,Palo Alto,CA:IEEE Computer Society,2004:251-262.
[9] Arnold M,Ryder B G.A framework for reducing the cost of instrumented code[J].ACM SIGPLAN Notices,2001,36(5):168-179.
[10] Joshi R,Bond M D,Zilles C.Targeted path profiling:lower overhead path profiling for staged dynamic optimization systems[C]//Proc.of the International Symposium on Code Generation and Optimization:Feedback-directed and Runtime Optimization:IEEE Computer Society,2004:239-250.
[11] Bond M D,Mckinley K S.Practical path profiling for dynamic optimizers[C]//Proc.of the International Symposium on Code Generation and Optimization,Washington,DCt IEEE Computer Society,2005:205-216.
[12] Conte T M,Patel B A,Menezes K N,et al.Hardware-based profiling:an effective technique for profile-driven optimization[J].International Journal of Parallel Programming,1996,24(2):187-206.
[13] Narayanasamy S,Sherwood T,Sair S,et al.Catching accurate profiles in hardware[C]//Proc.of the 9th International Symposium on High-performance Computer Architecture,Washington,DC:IEEE Computer Society,2003:269-280.
[14] Vaswani K,Thazhuthaveetil M J,Srikant Y N.A programmable hardware path profiler[C]//Proc,of the International Symposium on Code Generation and Optimization,Washington,DC:IEEE Computer Society,2005:217-228.
[15] Dean J,Hicks J E,Waldspurger C A,et al.ProfileMe:hardware support for instruction-level profiling on out-of-order processors[C]//Proc.of the 30th Annual IEEE/ACM International Symposium on Microarchitecture,Washington DC:IEEE Computer Society,1997:292-302.
[16] Merten M C,Trick A R,George C N,et al.A hardwaredriven profiling scheme for identifying program hot spots to support runtime optimization[C] i//Proc,of the 26th Annual International Symposium on Computer Architecture,Atlanta,GA:IEEE Computer Society,1999.-136-148.
[17] Memik G,Mangione-Smith W H,Hu Wendong.Netbench:A benehmarking suite for network processors[C]//Proc,of the IEEE/ACM International Conference on Computer Aided Design,San Jose,CA:IEEE Press,2001:39-42.
[18] Nios Ⅱ processor reference handbook[Z].Altera Corporation,2007.
[19] Bond M D,Mckinley K S.Continuous path and edge profiling[C]//Proc.of the 38th Annual IEEE/ACM International Symposium on Microarchitecture,Barcelona,Spain:IEEE Computer Society,2005:130-140.
[20] Wall D W.Predicting program behavior using real or estimated profiles[J].ACM SIGPLAN Notices,1991,26(6):59-70.