基于HLS的高精度位移测量算法的硬件加速设计

doi:10.12305/j.issn.1001-506X.2025.02.01

系统工程与电子技术 ›› 2025, Vol. 47 ›› Issue (2): 341-351.doi: 10.12305/j.issn.1001-506X.2025.02.01

• 电子技术 •

基于HLS的高精度位移测量算法的硬件加速设计

陈昊然¹^,², 王天昊¹^,², 路美娜²^,*, 宋茂新², 罗环², 吴晓宇², 骆冬根², 裘桢炜²

1. 中国科学技术大学研究生院科学岛分院, 安徽合肥 230026
2. 中国科学院合肥物质科学研究院, 安徽合肥 230031

收稿日期:2024-03-11 出版日期:2025-02-25 发布日期:2025-03-18
通讯作者: 路美娜
作者简介:陈昊然 (2000—), 女, 硕士研究生, 主要研究方向为图像采集及数据处理
王天昊 (1999—), 男, 硕士研究生, 主要研究方向为视、听觉信息处理、模式识别
路美娜 (1986—), 女, 副研究员, 硕士, 主要研究方向为光电遥感
宋茂新 (1983—), 男, 研究员, 博士, 主要研究方向为光机设计
罗环 (1994—), 女, 工程师, 硕士, 主要研究方向为嵌入式软件开发
吴晓宇 (1998—), 女, 硕士研究生, 主要研究方向为光机设计
骆冬根 (1979—), 男, 副研究员, 博士, 主要研究方向为光电检测、偏振光学遥感
裘桢炜 (1982—), 男, 研究员, 博士, 主要研究方向为空间光学偏振遥感、大气气溶胶探测

High-precision displacement measurement algorithm based on HLS for hardware acceleration design

Haoran CHEN¹^,², Tianhao WANG¹^,², Meina LU²^,*, Maoxin SONG², Huan LUO², Xiaoyu WU², Donggen LUO², Zhenwei QIU²

1. Science Island Branch, Graduate School of University of Science and Technology of China, Hefei 230026, China
2. Hefei Institutes of Physical Science, Chinese Academy of Sciences, Hefei 230031, China

Received:2024-03-11 Online:2025-02-25 Published:2025-03-18
Contact: Meina LU

摘要/Abstract

摘要：

针对高精度位移传感器对高速位移测量算法的运行速度、可移植性及降低研发成本的需求, 提出一种基于高层次综合(high-level synthesis, HLS)技术的高精度测量算法的硬件加速设计方法。使用HLS技术实现C++语言到Verilog语言的综合, 针对高精度位移测量算法设计策略, 利用HLS技术中的流水化和数组重构等优化技术进行硬件加速, 并将其封装为知识产权(intellectual property, IP)核, 提高算法的可移植性。以Xilinx公司的Kintex-7系列现场可编程门阵列(field-programmable gate array, FPGA)芯片XC7K325TFFG676为载体的测量系统实验结果表明, 整个算法耗时91.8 μs, 相比数字信号处理(digital signal processor, DSP)单元将运行时间缩短了308.2 μs, 测量精度达到44.44 nm, 稳定性为49.20 nm, 线性度为0.503‰。

关键词: 高层次综合技术, 位移检测, 现场可编程门阵列, 硬件加速

Abstract:

To address the requirements of high-precision displacement sensors for high-speed displacement measurement algorithms for operating speed, protability and lower researching and developing cost, a hardware acceleration design method for high-precision measurement algorithms based on high-level synthesis (HLS) technology is proposed. By using HLS, the C++code is synthesized into Verilog. The design strategy for high-precision displacement measurement algorithms employs optimization techniques such as pipelining and array partitioning in HLS to achieve hardware acceleration and the design is packaged as an intellectual property (IP) core to enhance portability of the proposed algorithm. The measurement system is implemented on a Xilinx Kintex-7 field-programmable gate array (FPGA) XC7K325TFFG676 chip as a carrier, and experimental results demonstrate that the entire operating time of the proposed algorithm is 91.8 μs, which is 308.2 μs shorter than the implementation time of a digital signal processor (DSP), with the measurement accuracy of 44.44 nm, stability of 49.20 nm, and linearity of 0.503‰.

Key words: high-level synthesis (HLS) technology, displacement measurement, field-programmable gate array (FPGA), hardware acceleration

中图分类号:

TP33

陈昊然, 王天昊, 路美娜, 宋茂新, 罗环, 吴晓宇, 骆冬根, 裘桢炜. 基于HLS的高精度位移测量算法的硬件加速设计[J]. 系统工程与电子技术, 2025, 47(2): 341-351.

Haoran CHEN, Tianhao WANG, Meina LU, Maoxin SONG, Huan LUO, Xiaoyu WU, Donggen LUO, Zhenwei QIU. High-precision displacement measurement algorithm based on HLS for hardware acceleration design[J]. Systems Engineering and Electronics, 2025, 47(2): 341-351.

图/表 22

图1

图2

图3

图4

图5

表1

表2

图6

图7

表3

表4

图8

表5

表6

表7

表8

图9

图10

表9

图11

图12

表10

参考文献 38

1	李清泉, 陈睿哲, 涂伟, 等. 基于惯性相机的大跨度桥梁线形形变实时测量方法[J]. 武汉大学学报, 2023, 48 (11): 1834- 1843.
	LI Q Q , CHEN R Z , TU W , et al. Real-time vision-based deformation measurement of long-span bridge with inertial sensors[J]. Geomatics and Information Science of Wuhan University, 2023, 48 (11): 1834- 1843.
2	丁孺琦, 王振, 程敏, 等. 基于模型控制的液压机械臂高精度轨迹跟踪[J]. 机械工程学报, 2023, 59 (14): 298- 309.
	DING R Q , WANG Z , CHENG M , et al. Model-based control of the hydraulic manipulator for the high-precision trajectory tracking[J]. Journal of Mechanical Engineering, 2023, 59 (14): 298- 309.
3	GAO W , KIM S W , BOSSE H , et al. Measurement technologies for precision positioning[J]. CIRP Annals, 2015, 64 (2): 773- 796. doi: 10.1016/j.cirp.2015.05.009
4	杨宏兴, 付海金, 胡鹏程, 等. 超精密高速激光干涉位移测量技术与仪器[J]. 激光与光电子学进展, 2022, 59 (9): 305- 319.
	YANG H X , FU H J , HU P C , et al. Ultra-precision and high-speed laser interferometric displacement measurement technology and instrument[J]. Laser Optoelectron Progress, 2022, 59 (9): 305- 319.
5	GEORGIS G , LENTARIS G , REISIS D . Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution[J]. Journal of Real-Time Image Processing, 2019, 16 (4): 1207- 1234. doi: 10.1007/s11554-016-0619-6
6	NAZ N , MALIK H A , KHURSHID A B , et al. Efficient processing of image processing applications on CPU/GPU[J]. Mathe- matical Problems in Engineering, 2020, 2020 (1): 4839876.
7	谭鹏源, 薛长斌, 周莉. 基于嵌入式CPU+GPU异构平台的遥感图像滤波加速[J]. 空间科学学报, 2024, 44 (1): 95- 102.
	TAN P Y , XUE C B , ZHOU L . Acceleration of remote sensing image filtering based on embedded CPU+GPU heterogeneous platform[J]. Chinese Journal of Space Science, 2024, 44 (1): 95- 102.
8	HUANG F , CHEN S Y , WANG Q , et al. Using deep learning in an embedded system for real-time target detection based on images from an unmanned aerial vehicle: vehicle detection as a case study[J]. International Journal of Digital Earth, 2023, 16 (1): 910- 936.
9	WOJENSKI A , ZBROSZCZYK H , KRUSZEWSKI M , et al. Hardware acceleration of complex HEP algorithms with HLS and FPGAs: methodology and preliminary implementation[J]. Computer Physics Communications, 2024, 295, 108997.
10	赵鹏, 程光, 赵德宇. 基于FPGA的高性能可编程数据平面研究综述[J]. 软件学报, 2023, 34 (11): 5330- 5354.
	ZHAO P , CHENG G , ZHAO D Y . Survey on FPGA-based high-performance programmable data plane[J]. Journal of Software, 2023, 34 (11): 5330- 5354.
11	ASANO S, MARUYAMA T, YAMAGUCHI Y. Performance comparison of FPGA, GPU and CPU in image processing[C]//Proc. of the IEEE International Conference on Field Progra-mmable Logic and Applications, 2009: 126-131.
12	李博杰. 基于可编程网卡的高性能数据中心系统[D]. 合肥: 中国科学技术大学, 2019.
	LI B J. High performance data center systems with programmable network interface cards[D]. Hefei: University of Science and Technology of China, 2019.
13	SRIDHARAN S, DURANTE P, FAERBER C, et al. Accele-rating particle identification for high-speed data-filtering using OpenCL on FPGAs and other architectures[C]//Proc. of the IEEE 26th International Conference on Field Programmable Logic and Applications, 2016.
14	周全. 基于FPGA和DSP架构的实时高速图像处理系统的硬件平台设计[D]. 重庆: 重庆理工大学, 2016.
	ZHOU Q. The hardware platform design of high-speed real-time image processing system based on DSP and FPGA[D]. Chongqing: Chongqing University of Technology, 2016.
15	LI Y, ZHAO X D, CHENG T R. Heterogeneous computing platform based on CPU+FPGA and working modes[C]//Proc. of the IEEE 12th International Conference on Computational Intelligence and Security, 2016: 669-672.
16	YANG Z P, JI S X, CHEN X Z, et al. Challenges and opportunities to enable large-scale compuating via heterogeneous chiplets[C]//Proc. of the 29th Asia and South Pacific Design Automation Conference, 2024: 765-770.
17	HAJIRASSOULIHA A , TABERNER A J , NASH M P , et al. Suitability of recent hardware accelerators (DSPs, FPGAs, and GPUs) for computer vision and image processing algorithms[J]. Signal Processing: Image Communication, 2018, 68, 101- 119.
18	赵子豪, 骆冬根, 路美娜, 等. 基于SOPC的检焦图像实时处理系统设计[J]. 电子测量技术, 2022, 45 (9): 31- 37.
	ZHAO Z H , LUO D G , LU M N , et al. Design of real-time processing system of focus detection image based on SOPC[J]. Electric Measurement Technology, 2024, 45 (9): 31- 37.
19	SU S F , CHANG M W . Adaptive neural acceleration unit based on heterogeneous multicore hardware architecture FPGA and software-defined hardware[J]. Journal of the Chinese Institute of Engineers, 2024, 47 (3): 337- 350.
20	徐诚, 郭进阳, 李超, 等. 使用HLS开发FPGA异构加速系统: 问题、优化方法和机遇[J]. 计算机科学与探索, 2023, 17 (8): 1729- 1748.
	XU C , GUO J Y , LI C , et al. Using HLS to develop FPGA hetero- geneous acceleration system: problems, optimization methods and opportunities[J]. Journal of Frontiers of Computer Science & Technology, 2023, 17 (8): 1729- 1748.
21	SOHRABIZADEH A, WANG J, CONG J. End-to-end optimization of deep learning applications[C]//Proc. of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020: 133-139.
22	LIU X H, CHEN Y, NGUYEN T, et al. High level synthesis of complex applications: an H. 264 video decoder[C]//Proc. of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016: 224-233.
23	HU Y W, DU Y X, USTUN E, et al. GraphLily: accelerating graph linear algebra on HBM-equipped FPGAs[C]//Proc. of the IEEE/ACM International Conference on Computer Aided Design, 2021.
24	LIANG X R, ZENG J S, GUO X, et al. Optimization of laser spot center detection based on laser triangulation[C]//Proc. of the 3rd International Conference on Optics and Image Processing, 2023.
25	倪沛东. 基于激光三角法的目标位移测量方法及系统设计[D]. 太原: 中北大学, 2023.
	NI P D. Target displacement measurement method and system design based onlaser triangulation[D]. Taiyuan: North University of China, 2023.
26	ZHANG Q J , ZHAO Y H . Measurement method of laser spot center based on weight interpolation algorithm[J]. Laser & Infrared, 2016, 46 (1): 81- 84.
27	XIAO M F, ZHANG Y M, LI H. High-precision spot position- ing algorithm based on four-quadrant detector[C]//Proc. of the Journal of Physics: Conference Series, 2020, 1633(1): 012122.
28	ZHOU P, WANG X Q, HUANG Q Y, et al. Laser spot center detection based on improved circled fitting algorithm[C]//Proc. of the 2nd IEEE Advanced Information Management, Communicates, Electronic and Automation Control Confe-rence, 2018: 316-319.
29	ZENG K, LI Y L, XIONG Y Z. A signal denoising system for CCD spectrometer based on FPGA[C]//Proc. of the 4th International Conference on Signal Processing and Computer Science, 2023, 12970: 455-462.
30	GAO R H , LIU H S , ZHAO Y , et al. High-precision laser spot center positioning method for weak light conditions[J]. Applied Optics, 2020, 59 (6): 1763- 1768.
31	ZHAO H L , WANG S Z , SHEN W , et al. Laser spot centering algorithm of double-area shrinking iteration based on baseline method[J]. Applied Sciences, 2022, 12 (21): 11302.
32	XU P F , JIA Y J . SNR improvement based on piecewise linear interpolation[J]. Journal of Electrical Engineering, 2021, 72 (5): 348- 351.
33	BAILEY D G . Design for embedded image processing on FPGAs[M]. New Jersey: Wiley, 2023.
34	PENG X X , TANG Y , LI J F , et al. FPGA-based CCD signal acquisition and transmission system design[J]. Scientific Reports, 2024, 14 (1): 1855.
35	BOYLE S, GUNDERSON A, ORLANDIC M. High-level FPGA design of deep learning hyperspectral anomaly detection[C]// Proc. of the IEEE Nordic Circuits and Systems Conference, 2023.
36	SHAO Z Y . An FPGA-based adaptive solution for synchronous configuration in UART communication[J]. Highlights in Science, Engineering and Technology, 2024, 81, 615- 622.
37	NOROUZI M, ILIAS Q, JANNESARI A, et al. Accelerating data-dependence profiling with static hints[C]//Proc. of the 25th International Conference on Parallel and Distributed Computing, 2019: 17-28.
38	李朝帅. 面向多分支语句的自动重构方法研究[D]. 石家庄: 河北科技大学, 2024.
	LI Z S. An automated refactoring approach for multi-branch statement[D]. Shijiazhuang: Hebei University of Science and Technology, 2024.

性能	优化前		优化后
性能	最小	最大	最小	最大
时延	8 485	32 294	4 118	27 927
间隔	8 485	32 294	4 118	27 927

优化状态	资源名称
优化状态	BRAM	DSP	FF	LUT
优化前	12	27	9 756	16 711
优化后	10	27	8 927	16 233

性能	优化前		优化后
性能	最小	最大	最小	最大
时延	4 118	27 927	872	5 540
间隔	4 118	27 927	872	5 540

优化状态	BRAM	DSP	FF	LUT
优化前	10	27	8 927	16 233
优化后	10	49	13 761	21 273

性能	优化前		优化后
性能	最小	最大	最小	最大
时延	872	5 540	858	5 520
间隔	872	5 540	858	5 520

基于HLS的高精度位移测量算法的硬件加速设计

High-precision displacement measurement algorithm based on HLS for hardware acceleration design

RichHTML

PDF (PC)

可视化

摘要/Abstract

引用本文

使用本文

图/表 22

参考文献 38

相关文章 12

编辑推荐

Metrics

本文评价

最优化	BRAM	DSP	FF	LUT
优化前	6	49	46 909	180 172
优化后	8	49	27 552	117 682

时间	均值/mm	3倍标准差/nm	峰谷值/mm
30 s	24.23	44.44	0.178 5
30 min	24.25	49.20	0.276 7

实验	方案	工作频率/MHz	处理时间/μs
实验1	FPGA	100	91.8
实验2	DSP	1 000	400

[1]	刘永庆, 刘鹏, 云日升, 张祥坤, 王特. 海洋4A散射计幅相校正算法FPGA优化实现[J]. 系统工程与电子技术, 2024, 46(8): 2554-2562.
[2]	汪敏, 冯一伦, 蒋彦雯, 范红旗. 雷达波形通用调制引擎设计[J]. 系统工程与电子技术, 2023, 45(6): 1684-1692.
[3]	安辉耀1, 刘敦伟1,2, 耿瑞华3, 曾和平4, 赵林欣1. #br# 量子通信系统中基于FPGA的偏振控制[J]. 系统工程与电子技术, 2016, 38(8): 1917-1921.
[4]	樊养余，于泽琦，袁永金，吕国云. 基于FPGA的高性能D类功放控制器#br# 设计与实现[J]. 系统工程与电子技术, 2014, 36(4): 630-636.
[5]	唐林波, 陶芬芳, 赵保军, 刘嘉骏. 基于FPGA的实时整数霍夫变换[J]. Journal of Systems Engineering and Electronics, 2012, 34(3): 610-613.
[6]	刘光祖，王建新，徐达龙. 数字信道化接收机高效结构的设计与实现[J]. Journal of Systems Engineering and Electronics, 2012, 34(2): 391-395.
[7]	黄杰文，祁海明，李早社，禹卫东. 星载SAR中频数字接收机的FPGA设计与实现[J]. Journal of Systems Engineering and Electronics, 2011, 33(4): 769-773.
[8]	罗海坤，吴嗣亮，王永庆. 基于改进ziggurat算法的高斯白噪声发生器[J]. Journal of Systems Engineering and Electronics, 2011, 33(4): 879-883.
[9]	杨保平，陈永光，陈军，徐忠富. 基于FPGA的战术数据链中继传输复接技术[J]. Journal of Systems Engineering and Electronics, 2010, 32(12): 2628-2631.
[10]	王虹现, 全英汇, 邢孟道, 张守宏. 基于FPGA的SAR回波仿真快速实现方法[J]. Journal of Systems Engineering and Electronics, 2010, 32(11): 2284-2289.
[11]	王永明, 王世练, 张尔扬. 1.2 GSPS数字信道化接收机的设计与实现[J]. Journal of Systems Engineering and Electronics, 2009, 31(6): 1324-1327.
[12]	叶有时，唐林波，赵保军，蔡晓芳. 基于SOPC的深空目标实时跟踪系统[J]. Journal of Systems Engineering and Electronics, 2009, 31(12): 3002-3006.