基于错误特征的MLC闪存最小和译码算法

doi:10.3969/j.issn.1001-506X.2019.08.29

系统工程与电子技术 ›› 2019, Vol. 41 ›› Issue (8): 1887-1895.doi: 10.3969/j.issn.1001-506X.2019.08.29

基于错误特征的MLC闪存最小和译码算法

张旋1,2, 慕建君1, 焦晓鹏1

1. 西安电子科技大学计算机科学与技术学院, 陕西西安 710071;
2. 西安理工大学高等技术学院, 陕西西安 710048

出版日期:2019-07-25 发布日期:2019-07-25

Min-sum decoding algorithm based on error characteristics for MLC flash memory

ZHANG Xuan1,2, MU Jianjun1, JIAO Xiaopeng1

1. School of Computer Science and Technology, Xidian University, Xi’an 710071, China;2. Xi’an University of Technology, Faculty of Higher Vocational and Technical Education, Xi’an 710048, China

Online:2019-07-25 Published:2019-07-25

摘要/Abstract

摘要：

由于多级单元(multilevelcell,MLC)闪存存储信道中随机电报噪声(random telegraph noise,RTN)、〖JP〗数据保持噪声(data retention noise,DRN)和单元间干扰(cell-to-cell interference,CCI)严重影响了MLC闪存阈值电压,从而导致获取的对数似然比(log-likelihood ratio,LLR)不够准确而影响了软判决译码时MLC闪存的低密度校验(low-density parity-check codes,LDPC)码的性能。在深入分析MLC闪存错误特征的基础上,通过利用MLC阈值电压的熵函数计算相邻MLC阈值电压分布的重叠区域来确定存储比特的可靠度,设计了MLC存储比特LLR值的动态更新策略。从而,提出了RTN、DRN和CCI噪声模型下适用于MLC闪存的LDPC码改进的最小和译码算法。仿真结果表明,与传统的LDPC码最小和译码算法相比较,MLC闪存信道下所改进的MLC闪存的LDPC码最小和译码算法具有更好的译码性能与更少的平均迭代次数。

关键词: 多级单元, 随机电报噪声, 数据保持噪声, 低密度校验码, 最小和译码

Abstract:

Multi-level cell (MLC) threshold voltage is seriously affected by random telegraph noise (RTN), data retention noise (DRN) and cell-to-cell interference (CCI) in MLC flash channel, which leads to lower-accuracy of the log-likelihood ratio (LLR) value and affects the performance of low-density parity check (LDPC) codes under soft decision decoding in MLC flash memory. Based on the analysis of the error characte ristics of MLC flash memory, by using the entropy function of MLC threshold voltage for calculating the overlap region of the adjacent threshold voltage distribution to determine the reliability value of stored bit corresponding to MLC threshold voltage, a strategy of dynamically updating the LLR value for stored bit is designed. Thus, an improved min-sum decoding algorithm of LDPC codes for MLC flash memory is presented over the RTN, DRN and CCI noises. The simulation results show that the decoding performance of the improved min-sum decoding algorithm for MLC flash memory is better than that of the conventional min-sum decoding algorithm. Furthermore, the average number of iterations is reduced.

Key words: multi-level cell (MLC), random telegraph noise, data retention noise, low-density parity check (LDPC) codes, min-sum (MS) decoding

张旋, 慕建君, 焦晓鹏. 基于错误特征的MLC闪存最小和译码算法[J]. 系统工程与电子技术, 2019, 41(8): 1887-1895.

ZHANG Xuan, MU Jianjun, JIAO Xiaopeng. Min-sum decoding algorithm based on error characteristics for MLC flash memory[J]. Systems Engineering and Electronics, 2019, 41(8): 1887-1895.

基于错误特征的MLC闪存最小和译码算法

Min-sum decoding algorithm based on error characteristics for MLC flash memory

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