分布式时隙同步抗时钟频率不一致性能分析

doi:10.3969/j.issn.1001-506X.2011.05.33

Journal of Systems Engineering and Electronics ›› 2011, Vol. 33 ›› Issue (5): 1124-.doi: 10.3969/j.issn.1001-506X.2011.05.33

分布式时隙同步抗时钟频率不一致性能分析

杨琦, 石江宏, 陈辉煌

厦门大学信息科学与技术学院, 福建厦门 361005

出版日期:2011-05-25 发布日期:2010-01-03

Anti clock frequency deviation performance analysis of decentralized slot synchronization

YANG Qi, SHI Jiang-hong, CHEN Hui-huang

School of Information Science and Technology, Xiamen University, Xiamen 361005, China

Online:2011-05-25 Published:2010-01-03

摘要/Abstract

摘要：

针对节点时钟频率不一致而引起时隙漂移的情况,分析分布式时隙同步算法的性能。通过把一个时隙周期内的累积时钟偏差等效为时隙相位偏差,建立干扰模型,证明了采用分布式平均的时隙互同步算法可以避免节点时隙偏移量随时间的累积,并将节点之间的最大时隙偏差控制在一定范围内。最后,用计算机仿真和实物测试验证了分布式时隙同步算法可以保证节点之间的同步。

Abstract:

The performance of the distributed slot synchronization algorithm is analyzed under the situation of slot drift due to different crystal frequencies. An interference model is established by setting the accumulate clock deviation to be equivalent to a slot phase deviation. It is proved that the accumulation of slot deviation can be avoided and the maximum of slot deviation can be controlled within a limited range by using the distributed slot synchronization algorithm. Finally, the simulation and reality test show that using the distributed slot synchronization algorithm can assure the slot synchronization of each node in ad hoc network.

杨琦, 石江宏, 陈辉煌. 分布式时隙同步抗时钟频率不一致性能分析[J]. Journal of Systems Engineering and Electronics, 2011, 33(5): 1124-.

YANG Qi, SHI Jiang-hong, CHEN Hui-huang. Anti clock frequency deviation performance analysis of decentralized slot synchronization[J]. Journal of Systems Engineering and Electronics, 2011, 33(5): 1124-.

分布式时隙同步抗时钟频率不一致性能分析

Anti clock frequency deviation performance analysis of decentralized slot synchronization

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