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Efficient hardware architecture for miniature SAR on-board#br#  imaging processing system

HONG Feng1,2, HAN Rong-gui1,2, HU Xiao1, ZHANG Zhi-min1, WANG Yu1   

  1. 1. Space Microwave Remote Sensing System Department, Institute of Electronics, 
    Chinese Academy of Sciences, Beijing 100190, China;
    2.University of Chinese Academy of Sciences, Beijing 100049, China
  • Online:2014-04-24 Published:2010-01-03

Abstract:

Aiming to find solutions to system-level issues for miniature synthetic aperture radar (MiniSAR) on-board imaging processing, firstly this paper discusses the MiniSAR system’s design issues subject to its characteristics of limited mass, volume allocation and upgradeability, and analyzes the system requirements determined by the high-resolution parameter. The advantages and disadvantages of various traditional architectures are compared. A modular upgradeable reconfigurable architecture has been defined to reduce risks. Various efforts are paid to maximize the system performance, including reduction of data exchange between processors, improvement of data exchange efficiency and speed, and improvement of processing capability. Meanwhile a method combining hardware and software design using SOPC and NIOS II tools is proposed to accelerate developing progress. Finally, comparison with traditional method is made to verify the validity of the proposed schedule, and the imaging result and conclusion are given.

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