Journal of Systems Engineering and Electronics ›› 2011, Vol. 33 ›› Issue (5): 1124-.doi: 10.3969/j.issn.1001-506X.2011.05.33

Previous Articles     Next Articles

Anti clock frequency deviation performance analysis of decentralized slot synchronization

YANG Qi, SHI Jiang-hong, CHEN Hui-huang   

  1. School of Information Science and Technology, Xiamen University, Xiamen 361005, China
  • Online:2011-05-25 Published:2010-01-03

PDF (PC)

Abstract:

The performance of the distributed slot synchronization algorithm is analyzed under the situation of slot drift due to different crystal frequencies. An interference model is established by setting the accumulate clock deviation to be equivalent to a slot phase deviation. It is proved that the accumulation of slot deviation can be avoided and the maximum of slot deviation can be controlled within a limited range by using the distributed slot synchronization algorithm. Finally, the simulation and reality test show that using the distributed slot synchronization algorithm can assure the slot synchronization of each node in ad hoc network.

[an error occurred while processing this directive]