基于CRC的ASM信号维特比纠错算法

doi:10.12305/j.issn.1001-506X.2021.10.35

Abstract

Abstract:

To improve the demodulation in performance of application-specific messages (ASM) in very high frequency data exchange system (VDES), an improved cyclic redundancy check (CRC) based Viterbi error correction algorithm is proposed. By reducing the symbol state number reasonably and utilizing partial CRC in error correction, this algorithm balances the computational complexity and the error correction performance. Meanwhile, a new branch metric is proposed to solve the problem of performance loss caused by the too idealized classic branch metric. Simulation results show that the packet error rate performance of the new branch metric is 1 dB better than that of the classic branch metric in packet error rate (PER) performance. The performance of the proposed algorithm with 12 CRC registers is 1 dB better than the coherent demodulation algorithm, and the complexity is reduced to 1/4 of the classic algorithm by reducing the symbol state number reasonably.

Key words: very high frequency data exchange system (VDES), application-specific messages (ASM), cyclic redundancy check (CRC), Viterbi, error correction

CLC Number:

TN919.3+3

Peixin ZHANG, Jianxin WANG, Peng REN, Shushu YANG, Haiwei SONG. CRC based Viterbi error correction algorithm of ASM signals[J]. Systems Engineering and Electronics, 2021, 43(10): 2992-2999.

Figures/Tables 4

References 32

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CRC based Viterbi error correction algorithm of ASM signals

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