Journal of Systems Engineering and Electronics ›› 2010, Vol. 32 ›› Issue (11): 2284-2289.doi: 10.3969/j.issn.1001-506X.2010.11.06

Previous Articles     Next Articles

Fast realization of SAR echo simulation based on FPGA

WANG Hong-Xian, QUAN Ying-Hui, XING Meng-Dao, ZHANG Shou-Hong   

  1. National Key Lab of Radar Signal Processing, Xidian Univ., Xi`an 710071, China
  • Online:2010-11-23 Published:2010-01-03

Abstract:

Echo simulation is of great significance to the research on synthetic aperture radar (SAR), but massive computation and longer time are needed. In order to realize SAR echo simulation fast, an improved concentric circles method is adopted to obtain a fast computation. Considering that the computation has the characteristics of regulation, the field programmable gate array (FPGA) is adopted as the kernel chirp to design the digital signal processing board to be specially used in SAR echo simulation. The simulation algorithm is realized on the board by programming, and then the resource usage and the quantization noise are given. The application result shows that the realization of SAR echo simulation based on FPGA can greatly accelerate the simulation speed and significantly reduce energy consumption.

[an error occurred while processing this directive]